Thanks for the reply.

I don't need more than 4M bits, and would be fairly happy with 256k bits. I could use smaller capacity in many applications, e.g. I wish the FPGA boot roms were fast enough and simple to program with random information. Unfortunately, the JTAG-programmable parts I have on hand don't allow random content programming with the vendor-provided tools, nor are they fast enough. I could do this with a CPLD, an EPROM, and a fast SRAM, but I'd prefer a single component if a suitable one exists. I'd prefer to use a part that can operate entirely stand-alone, too, i.e. with a clock, and hard-wired select and enable. Output buffering would be provided, of course.

What I want is to build a protocol verification tool, so that I can program a predefined sequence and then verify that that receiving module behaves as expected. That way, such verification is simple enough it can be encapsulated in a small, simple module, and can be included with a product as a diagnostic tool.

RE