| ??? 02/15/12 06:52 Read: times |
#185973 - Table suggestions Responding to: ???'s previous message |
Jan Waclawek said:
Updated both versions of the table.
Added the Cyrod singleclocker That is impressive, in fact nearly good enough to be used into a Simulator. So, a Couple of small suggestions : a) Add a clear tag for Start of Timing, and End of timing sections. Mnemonic might not be enough - maybe :Mnemonic ? b) Add comment syntax to non opcode lines, eg ;Arithmetic instructions c) Add a constant syntax for variable time opcodes. Slash for Taken/notTaken seems safe, some others would need a clean-up. d) STC have a new STC15F2K60S2 about to release, and yes, it is not quite the same. e) Atmel have extended opcodes in the AT89LP51Rx series, so those would need eg :Mnemonic_Extension |
| Topic | Author | Date |
| '51 derivatives cycle comparison table updated | 01/01/70 00:00 | |
| above about 40 Mhz devices may need extra cycles | 01/01/70 00:00 | |
| silabs with cache | 01/01/70 00:00 | |
| Ok, a SILabs cache lesson | 01/01/70 00:00 | |
| Bytes | 01/01/70 00:00 | |
| ecc? | 01/01/70 00:00 | |
| not the cookies | 01/01/70 00:00 | |
| Washed? | 01/01/70 00:00 | |
| am I as has happened before ... | 01/01/70 00:00 | |
| Is that how it's spelled? | 01/01/70 00:00 | |
| re: Washed? | 01/01/70 00:00 | |
| jump cache miss penalty | 01/01/70 00:00 | |
| clarifications | 01/01/70 00:00 | |
| no cache for 50MHz | 01/01/70 00:00 | |
| surely not all | 01/01/70 00:00 | |
| you missed a word | 01/01/70 00:00 | |
| more update | 01/01/70 00:00 | |
| Table suggestions | 01/01/70 00:00 | |
Updated MC51 supports Cycle Define | 01/01/70 00:00 |