The structure of P0 is different from P1,2,3.

Pull-ups are generally used on this port ensure this port does not float into it's "linear" region. If you use a an external ROM device then then you need only worry about the RESET and POWER DOWN mode. If you use internal memory it is typical to write a 00H just after RESET to establish an static logic state for the pins.

Please excuse the rather long quote to follow:


"When the 80C51BH is in reset, the Port 0 pins are in a float state unless they are externally pulled up or down. If it's going to be held in reset for just a short time, the transient float state can probably be ignored. When it comes out of reset, the pins stay afloat unless they are externally pulled either up or down. Alternatively, the software can internally write 0s to whatever
Port 0 pins may be unused."

"CMOS input pins should not be left to float, but should always be pulled to one logic level or the other. If they float, they tend to float into the transition region between 0 and 1, where the pullup and pulldown devices in the input buffer are both conductive. This causes a significant increase in I CC . A similar effect exists in
HMOS circuits, but with less noticeable results."

"In 80C51BH and 80C31BH designs, unused pins of Ports 1, 2, and 3 can be ignored, because they have internal pullups that will hold them at a valid Logic 1 level. Port 0 pins are different, however, in not having
internal pullups (except during bus operations)."

"Consider the 80C31BH in the Power Down or Idle modes, however. In those modes it is not fetching instructions, and the Port 0 pins will float if not externally pulled high or low. that I OL doesn't exceed the value specified on the data sheet. In most CMOS applications, the minimum value
would be about 2k X."

ftp://download.intel.com/design/MCS51/applnots/27006802.pdf