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03/04/02 18:17
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#20384 - RE: what is float state-phillip
CMOS input are very Hi-Z. As you probably know the CMOS structure uses a P and N Mos transistor architecture. Any leakage or external potentials can cause an unterminated input to start to float to the linear region where both the P and N channel devices are conducting. The fact that it floats to this linear region is because both the devices will "self-bias" to approx. 1/2 VCC.

regards,
p



List of 18 messages in thread
TopicAuthorDate
what's the need of pullup for P0            01/01/70 00:00      
RE: what's the need of pullup for P0            01/01/70 00:00      
RE: what's the need of pullup for P0            01/01/70 00:00      
RE: what\'s the need of pullup for P0            01/01/70 00:00      
RE: what's the need of pullup for P0 "J"            01/01/70 00:00      
RE: what's the need of pullup more            01/01/70 00:00      
RE: what\\\'s the need of pullup more            01/01/70 00:00      
RE: what\\\'s the need of pullup more            01/01/70 00:00      
RE: what's the need of pullup Philip            01/01/70 00:00      
RE: what\\\'s the need of pullup more            01/01/70 00:00      
RE: what's the need of pullup for P0 "J"            01/01/70 00:00      
RE: what's the need of pullup Philip            01/01/70 00:00      
RE: what\\\'s the need of pullup for P0 \\            01/01/70 00:00      
RE: what's the need of pullup Philip            01/01/70 00:00      
RE: what is float state-phillip            01/01/70 00:00      
RE: what's the need of pullup Philip            01/01/70 00:00      
RE: what\\\'s the need of pullup for real            01/01/70 00:00      
RE: what is float state-phillip            01/01/70 00:00      

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