| ??? 11/22/02 14:10 Read: times |
#32948 - RE: more than 16 bits timers ? |
At frequencies in the GHz range you will be much better off using a (C)PLD that does the counting gated by the uC. It is very simple in a CPLD such as the CoolRunner from Xilinx to build a n bit counter that can be memory mapped to the 668.
Erik |
| Topic | Author | Date |
| more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? Jez | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? Jez | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? Jez | 01/01/70 00:00 | |
| RE: more than 16 bits timers ? | 01/01/70 00:00 | |
RE: more than 16 bits timers ? | 01/01/70 00:00 |