In the olden days I saw some that were so enamored by the 8255 that they used it for anything, even when just a latch would do it.
If you "fear" CPLDs, the (part of the) 8255 functionality (you need) can be implemented by simple means using discretes. All you need is an address decoding chip and some latches. I, once, did just that.
HOWEVER, the "right" way to do memory-mapped I/O IS with a (C)PLD. One advantage of using a CPLD is that you can fix your "wiring mistakes" in software. Also having the ALE latch inside the CPLD gives you half the address bits to decode for free.

Today I basically go by two methods
1) If I can live with 28 I/O pins and 8k of RAM I use the P89C668 configured with P0 and P2 as pure I/O (no external memory at all).
2) If I can not, I use the P89C51RD2 and a CPLD and external RAM.
3) If it comes up, (more I/O needed and 8k RAM is enough) I may use the P89C668 and a CPLD

Erik