Raghunathan:

I know it may be attractive to look at the atmel flash thingey it is my belief that you will find the compact flash a very nice solution. If you have not already done so I think you should look over the link I gave in the post here....

http://www.8052.com/forum/read.phtml?id=47490

Here in the AN123 there is a very simple scheme to connect a compact flash up to a processor. It can be simple port pins, but I recommend setting it up with the external BUS. There is a low level driver written in AVR assembly that you can obtain via AN123 which shows how to communicate with the FLASH card. However I found that code written by somebody that did not appreciate modularity and easy of understanding assembler programming. Anyway I rolled my own driver in Keil C51 which should run on most any 8051 part provided you have an external bus interface onto which to hang the compact flash socket and some amount of XDATA space RAM in which to buffer the 512 byte sectors to and from the CF card. If you wish to see this code drop me an email and I'll send it to you.

Note that I am currently working a project to publish on my home page to document the whole compact flash card thing. However I intend to support up to almost 64K of SRAM in the external BUS and then have a Lattice CPLD in between the CF card and the SRAM and the processor. With this scheme I will have the capability to do normal block transfers to/from the CF card into the SRAM via a double MOVX access (one transfer the data from CF card to the ACC and a second to transfer the data to the SRAM). I will also support a mode, via the CPLD where I have made a memory address counter in the CPLD that can supply a memory address to the SRAM. I have programmed a secondary set of port addresses to acccess the CF card with a mode I call "fly-by DMA". In this mode a loop with a single MOVX instruction can access the compact flash card and at the same exact time run a complementary cycle to the SRAM at the address in the memory address counter. So when reading the CF card the data is simultaneously written into the SRAM. After each if these fly-by DMA cycles the address of the SRAM in the counter is incremented. My CPLD design still keeps full random access to the SRAM available at all times so it is possible for other code or interrupts to access other parts of the SRAM as normal XDATA memory.

I can share any of the work I've done so far if you want to see it, including the Lattice CPLD design, which was done with the free downloadable Lattice ispLever design package.

I wont actually be publishing the article for a while because I intend to import the DOS fat file system drivers from one of the public license software developmment projects at SourceForge, Once these are ported to Keil C it will be possible to support files on the compact flash card in a format that makes data placed on the card fully accessible under windows when the flash card is plugged into the likes of one of the $15 USB compact flash card readers. (There are some examples of FAT support for compact flash cards floating around on the net but all of them are limited in some way such as root only, or no random cluster chain following, or assumes single file on whole card that is preallocated under windows etc etc. So my intention is solve that problem and make some portable code that runs on a 8051 to implement the file system.

My guess so far is that I'm looking at about 24K of object code to provide that capability. (Depends to some extent how well the Keil C51 compiler can crunch down this FAT access code that I have downloaded that the author made for running on a PC platform under a clone DOS environment). That work is in process but will take a while to complete as it is just "hobby" project right now.

Michael Karas