| ??? 07/21/03 14:23 Read: times |
#51058 - RE: sram address bus config Responding to: ???'s previous message |
In a standard 32K*8 sram chip, are the address pins in the correct order to input binary? ... and so on, or do the address lines go the other way around, a14 being at the end etc? ..Are the data lines the same also, do they go D7 to D0 descending the same as the address lines?
Why do you care, even if you totally scramble the bitsequence, you will read back what you wrote. Erik PS A0 is LSB and D0 is LSB |
| Topic | Author | Date |
| sram address bus config | 01/01/70 00:00 | |
| RE: sram address bus config | 01/01/70 00:00 | |
| RE: sram address bus config | 01/01/70 00:00 | |
| RE: sram address bus config | 01/01/70 00:00 | |
| RE: sram address bus config | 01/01/70 00:00 | |
RE: sram address bus config | 01/01/70 00:00 |