Peter Dannegger wrote:
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The reset input on the 74hc595 resets only the shift register, but not the latch. So it is still possible, that after power up the latch contain ones.

Thanks for that information.

I didn't study the timing diagram closely enough...

Thus I connected the output enable of the 74hc595 to the 8051. After power on reset all pins of the 8051 are high and thus the output stages of the 74hc595 are disabled.

And only, if a valid data byte was shifted in and latched, the 8051 enable the outputs of the 74hc595.

I would like to avoid extra wires (the 595 is on a seperate board), but I guess I could use a reset chip on the OE pin...

Best regards,

Mikkel C. Simonsen