Hi,

Here is the corrected drawing

*- 100k --*
| |
--*-- 100k -*-| |
| | |
2 | |
5 | |
0 | /---*-- out to adc
R | /
| | /
--*-- 100k -*-|/
|
|
*-- 100k --> bias pot, adj for 0 V out @ 4mA
|
1
0
0
k
|
Gnd