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???
11/26/03 21:21
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#59487 - RE: difference between 89c52 & 89s52
Responding to: ???'s previous message
sachin:
I guess you need it on a plate.

I did a quick cross check between the AT89C52 and the AT89S52 data sheets. Here is the list of main differences I found between these parts:

    'C52 Not Recommended for New Designs.
    'C52 Fully Static Operation: 0 Hz to 24 MHz
    'S52 Fully Static Operation: 0 Hz to 33 MHz
    'S52 Interrupt Recovery from Power-down Mode
    'S52 Watchdog Timer
    'S52 Dual Data Pointer
    'S52 Power-off Flag
    'S52 Fast Programming Time
    'S52 Flexible ISP Programming (Byte and Page Mode}
    'C52 PQFP/TQFP
    'S52 TQFP only
    'S52 The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt OR hardware reset.
    'S52 Reset input. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.
    'S52 SFR AUXR1 (XXXXXXX0) @ 0xA2
    'S52 SFR WDTRST (XXXXXXXX) @ 0xA6
    'S52 Has FLASH Serial Programming Instruction Set
    'C52 Specifies Power Mode Icc @ VCC = 3V to be 40 µA
    'C52 Has different timing figures in the Variable Oscillator timing chart than the 'S52
    'C52 Has different External Clock Drive Timing peroids than the 'S52
    'C52 Has speed grades 12, 16, 20, 24 MHz
    'S52 Has speed grades 24, 33 MHz


Since I read the data sheets you can wash the dishes.

As to whether extra hardware is needed to implement an 'S52 as compared to the 'C52 it seems to me that this depends primarily on how you intend to deal with the 'S52 regards the following items:

  1. If you are implementing a new design or enhancing an existing design

  2. If you intend to operate and a different frequency

  3. If you need to deal with the RESET pin activation on WDT timeout

  4. If you want to try to use the interrupt recovery from power down mode

  5. If you try to use the in-system-programming capabilities

  6. Whether you connect up external bus peripherals and/or memory chips the timing may be different



OK Lets go for a beer....you can buy.

Michael Karas



List of 16 messages in thread
TopicAuthorDate
high density non volatile memory tech???            01/01/70 00:00      
   RE: high density non volatile memory tech???            01/01/70 00:00      
   RE: high density non volatile memory tech???            01/01/70 00:00      
      RE: high density non volatile memory tech???            01/01/70 00:00      
         RE: high density non volatile memory tech???            01/01/70 00:00      
            RE: high density non volatile memory tech???            01/01/70 00:00      
               RE: hi looking for single chip solution            01/01/70 00:00      
                  RE: hi looking for single chip solution            01/01/70 00:00      
                  RE: hi looking for single chip solution            01/01/70 00:00      
                     RE: hi looking for single chip solution            01/01/70 00:00      
                        RE: hi looking for single chip solution            01/01/70 00:00      
                           RE: hi looking for single chip solution            01/01/70 00:00      
            RE: difference between 89c52 & 89s52            01/01/70 00:00      
               RE: difference between 89c52 & 89s52            01/01/70 00:00      
               RE: difference between 89c52 & 89s52            01/01/70 00:00      
                  RE: difference between 89c52 & 89s52            01/01/70 00:00      

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