| ??? 01/14/04 12:01 Read: times |
#62536 - RE: Memory and RTC Responding to: ???'s previous message |
checking the datasheet:
http://www.atmel.com/dyn/produ...rt_id=2806 Atmel apparently states on page 7, note 1: twr is the time from a valid stop condition to the end of the internal write/clear cycle. I read this as: If a byte to be written has been received, it takes twr time to actually program this byte in eeprom. So I would assume that you have to wait twr time between consecutive writes. Oh by the way, Atmel saids in the same application note that twr is 5 ms Max. (on page 5 of same document). Now this is for an Atmel part. I do not know if this applies to other manufacturers. You will have to check their applictaion notes. regards Patrick |
| Topic | Author | Date |
| Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC, erratum | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
| RE: Memory and RTC | 01/01/70 00:00 | |
RE: Memory and RTC | 01/01/70 00:00 |



