Reading back the latch is the design characteristic of the way Intel devised the original 8051 design. It really has a lot to do with the quasi-bidirectional nature of the 8051's I/O pin architecture.

Other vendors have chosen to make the I/O pin structures different and so may have made other decisions regarding how the read/modify type instruction type pins will function. PIC's have TRIS registers to control if the output side of the port pins are tri-stated or not. MOT type parts have DDR registers to control the data direction for each port pin.

Which is best ?...each approach has its advantages and disadvantages....so the best choice it to pick that is most suitable for the application at hand.

And do not forget, some 8051 type derivatives, such as Cygnal parts, now have more programmability at the I/O pins than the original Intel part had. And some maybe less. In the case of Cygnal an I/O pin can be made a push pull output on a per pin basis. But if a peripheral function is assigned to an I/O pin via the crossbar then the normal I/O function of that pin is no longer available at the I/O pin. This can have an impact on some designs. Take for example if one is doing auto baud detect on a the RxD line, with a standard 8051 you simply poll the port bits to see the RxD line state. In the case of a Cygnal part this is not so easy.

Michael Karas