Oleg,

pFET1 is strong pull-up. pFET2 is very weak pull-up, about 1/10 of strength of strong pull-up. pFET3 is weak pull-up. pFET3 plus inverter form latch. If pin voltage is brought to less than about 1.5V, then pFET3 (weak pull-up) is switched off. This minimizes output current and supply current of micro. So, it's useful. pFET2 (very weak pull-up) is nevertheless turned-on to prohibit floating. pFET2 (weak pull-up) is strong enough to turn-on Darlington, e.g., connected directly to pin. At about then 1.4V pin voltage, pFET3 is turned-off, but 10µA output current is enough to drive darlington.

pFET3 in combination with inverter also provides a certain hysteresis. Above about 1.5V port can deliver up to about 200µA (depends on derivative), but at lower voltages at output, only 10µA can be delivered. This makes it possible to connect a simple resistor, poti, LDR, etc. directly to pin (other end to 0V), without to cause instability. Due to this hysteresis input situation is always defined.

Input inverter needs at least 2.0V (depends on derivative) to accept high state. There are many situations, where voltage at pin goes below 2.0V. Then, when reading pin instead of latch, misinterpretation would occur. So, it's not only for the case, that simple transistor with its base is directly connected to pin, but for all situations, where the voltage becomes smaller than 2.0V. If you also keep in mind, that certain dynamic conditions can cause negative glitches at pin (e.g. due to ground bounce), then even with rather high voltages at pin, reading back latch instead of pin is very advantegous.

Unemotionally,
Kai