NPN transistor and one optional resistor.

Collector to the 8051 input.
Base to 8051 enable output (maybe with 10K resistor in series).
Emitter to external signal source.

With enable 'low', +5 on emitter is blocked by BE junction.
GND on emitter blocked by BC junction.

With enable high, and emitter high, 8051 input pulls itself up.
With emitter low, transistor is in saturation and a low on emitter pulls the collector low (+0.2V).