| ??? 06/21/04 17:31 Read: times |
#72860 - RE: Counter problem in gating mode Responding to: ???'s previous message |
Hello,
Signals on the scope looks ok . I checked the edges of the signals there is no false triggering (at least nothing that i could see). Noise levels are ok . Values are random without any pattern. I will provide more detailed measurments on wednesday. Erik , Sorry for the crossposting,i was hoping to reach a wider public by posting this message on the 8052 forum . Not everybody is looking on the cygnal forum . Your last post on the cygnal forum confuses me. quote: then set up a timer as a counter 'C' and another as a timer 'T'.
in hardware tie your pulses to the counter input of C. no interrupt enabled for C, just for T Then set a value in T, clear C, set TR in both. When T interrupts, clear TR in both and read C The external gate pulse CONTROL the start/stop of counting in my suggested method. clk-pulses on T0 (counter)--> OK external Gate signal to ...? Counter stops counting when timer IRQ occurs in this case right ? The Timer is here responsible for the time frame not my external signal . How controls the external gate puls the start/stop of counting? Or do i missing something ? Regards, Luc |
| Topic | Author | Date |
| Counter problem in gating mode | 01/01/70 00:00 | |
| RE: Counter problem in gating mode | 01/01/70 00:00 | |
| RE: Counter problem in gating mode | 01/01/70 00:00 | |
| RE: Counter problem in gating mode | 01/01/70 00:00 | |
| RE: Counter problem in gating mode | 01/01/70 00:00 | |
| RE: Counter problem in gating mode | 01/01/70 00:00 | |
RE: Counter problem in gating mode | 01/01/70 00:00 |