I used extensively revision S and earlier and detected none of the described errata.

Maybe it happens not, since I use an external supervisor circuit (MAX813L).


Also I tried to force the "never ISP state" without success.
Putting all SPI pin to low or permanent toggling immediately after reset has no influence on the ISP capability.
Maybe the difference is, that I activate the ISP interface only after about 50ms after the reset pin was activated. Thus no fighting of different output levels can occur.


Peter