"ASEM Will accept the syntax except for the 10HP-part, it does not accept digits at the beginning. "

How I wish the problem ended there !!

I sure am aware of this and the code sample that I posted was just to demonstrate the issue. I named the variables with most common ones. Sorry if I had confused you all. The actual listing file ( assembles fine but does not work as expected ) is given below :

65:				;************************************************
   66:				;===== INTERNAL RAM STORAGE =====================
   67:				;************************************************
   68:
   69:		N	 10	DSEG AT	10H
   70:
   71:	    10	N	 01	DLY100:		DS 	1      	; 100mSec Timer preload location
   72:	    11	N	 01	DLY005: 	DS 	1      	; 5mSec Timer preload location
   73:	    12	N	 01	CNT_INTR:	DS 	1	; 5ms multiplier
   74:	    13	N	 01	CTR_DI:		DS 	1	; Debounce period counter
   75:	    14	N	 01	LUPCNTR:	DS    	1	; General purpose loop counter
   76:	    15	N	 01	CNT10SEC:	DS	1       ; 10 sec ticker
   77:
   78:		N	 20	DSEG  AT 20H
   79:
   80:	    20	N	 01	DOT1_IMAG:      DS      1       ; Output group 1 image
   81:	    21	N	 01	DOT2_IMAG:      DS      1       ; Output group 2 image
   82:	    22	N	 01	DIN_01:		DS	1       ; Input group images ( 4 bytes )
   83:	    23	N	 01	DIN_02:		DS	1
   84:	    24	N	 01	DIN_03:		DS	1

....
....
....

121:				;***********************************************
  122:				;======= BIT ADDRESABLE RAM ====================
  123:				;***********************************************
  124:
  125:		N	 20	BSEG	AT 20H
  126:
  127:				; Group_1 controls
  128:
  129:	    20	N	 01	KEC_DRV:        DBIT 	1    	; Enable of Variable speed drive
  130:	    21	N	 01	PRE1_SOL:	DBIT    1       ; 20 Bar solenoid
  131:	    22	N	 01	PRE2_SOL:	DBIT	1       ; 38 Bar solenoid
  132:	    23	N	 01	PRE3_SOL:	DBIT	1       ; 180 Bar solenoid
  133:	    24	N	 01	FLO1_SOL:	DBIT    1       ; Flow #1 select
  134:	    25	N	 01	FLO2_SOL:	DBIT    1       ; FLow #2 select
  135:	    26	N	 01	PULS_SOL:       DBIT    1       ; Pulser sol
  136:	    27	N	 01	PROP_ENA:	DBIT    1       ; Proportional valve enable
  137:
  138:				; Group_2 controls
  139:
  140:	    28	N	 01	PRO_RAMP:       DBIT 	1    	; Enable prop. ramp

....
....
....

Dose anything appear amiss in the above ? To me they look fine. Bit segments 20H to 27H must overlay the Byte segment at 20H ?

Hmmm looks like more head scratching to do.

Raghu