??? 09/22/04 09:32 Read: times |
#77921 - RE: problem with SPI & MAX6662 (at89s8252) Responding to: ???'s previous message |
hi,
CPOL = 0; CPHA = 1; And so this is wrong configuration. Read MAX6662 datasheet which says: Data is clocked in to the MAX6662 at the rising edge of SCLK when the master is writing. Data is clocked out at the falling edge of SCLK when the master is reading. With SPI configuration you use, MAX6662 is not able to clock in data correctly as same as MCU is not able to read data correctly. As I said: try either CPOL = 0; CPHA = 0; or CPOL = 1; CPHA = 1; and then select appropriate one. Regards, Oleg |
Topic | Author | Date |
problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252) | 01/01/70 00:00 | |
RE: problem with SPI & MAX6662 (at89s8252)![]() | 01/01/70 00:00 |