| ??? 11/26/04 07:01 Read: times |
#81983 - re nesting of interrupts Responding to: ???'s previous message |
thanks for reply
intr0 has highest priority,after that timer0, i am taking care of interrupt in interrupt,interrupt0 can timer0,when ever program counter enter into timer_isr i set a bit on reti it is cleared any case if intr0 interrupt timer0 inbetween i check that bit before return from intr0 to timer0,reti address of intr0 is changed to bottom of timer_isr: thanks again |
| Topic | Author | Date |
| nesting of intr0 and timer0 | 01/01/70 00:00 | |
| the whole code please | 01/01/70 00:00 | |
| INT0 nature and Priority? | 01/01/70 00:00 | |
| re nesting of interrupts | 01/01/70 00:00 | |
| edge triggered | 01/01/70 00:00 | |
| What application is it details please? | 01/01/70 00:00 | |
| nesting of intr0 and timer0 not solved | 01/01/70 00:00 | |
| Problems with your code. | 01/01/70 00:00 | |
| not solved nested interrupts | 01/01/70 00:00 | |
| suspend interrupt | 01/01/70 00:00 | |
| resistance welding | 01/01/70 00:00 | |
| Location please? | 01/01/70 00:00 | |
| hi | 01/01/70 00:00 | |
| let me out nesting of intr0 and timer0 | 01/01/70 00:00 | |
| Demanding sort huh? | 01/01/70 00:00 | |
| Demanding ??? | 01/01/70 00:00 | |
Re: let me out nesting of intr0 and tim | 01/01/70 00:00 |