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???
11/26/04 14:01
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#82018 - nesting of intr0 and timer0 not solved
Responding to: ???'s previous message
hi oleg sergeev thanks for kind advice but i had already try this by clearing tf0 but it do not make any help any other suggestion please.

here is code of my application
mov a,#01h ;record for how many interrupts
mob b,#10h
mov ie,#10000010b
setb tcon.0
mov tmod,#11h
setb ie.0

interrupt0:
clr tcon.4
clr tcon.5
dec a
cjne a,#0ffh,weld_lsb_only
dec b
weld_lsb_only:
cjne a,#00h,weld_on_countinue
cjne a,b,weld_on_countinue
clr tcon.4
clr ie.0
reti
weld_on_countinue:
mov tl0,#54h ;setting1_lsb ;variable from 0to -10000
mov th0,#0d9h ;setting1_msb
setb tcon.4
jb timer_status.0,return_in_timer
reti
return_in_timer:
mov r1,sp
mov @r1,#02h
dec r1
mov @r1,#09h ;here the flash address of
reti ;label timer_return is loaded if
;timer_status.0 is high record if
;intr0 interrupt timer9 midway
isr_timer0:
setb timer_status.0 ;bit record if intr0 interrupt
clr tcon.4 ;timer0 inbetween
cpl port3.1
jb port3.1,pulse_high_time
mov th0,#0ffh
mov tl0,#9ch
setb tcon.4
clr timer_status.0
reti
pulse_high_time:
mov th0,#0feh
mov tl0,#70h
setb tcon.4
timer_return:
clr timer_status.0
reti

List of 18 messages in thread
TopicAuthorDate
nesting of intr0 and timer0            01/01/70 00:00      
   the whole code please            01/01/70 00:00      
   INT0 nature and Priority?            01/01/70 00:00      
   re nesting of interrupts            01/01/70 00:00      
      edge triggered            01/01/70 00:00      
   What application is it details please?            01/01/70 00:00      
      nesting of intr0 and timer0 not solved            01/01/70 00:00      
         Problems with your code.            01/01/70 00:00      
            not solved nested interrupts            01/01/70 00:00      
   suspend interrupt            01/01/70 00:00      
   resistance welding            01/01/70 00:00      
      Location please?            01/01/70 00:00      
         hi            01/01/70 00:00      
   let me out nesting of intr0 and timer0            01/01/70 00:00      
      Demanding sort huh?            01/01/70 00:00      
         Demanding ???            01/01/70 00:00      
      Re: let me out nesting of intr0 and tim            01/01/70 00:00      

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