??? 01/06/05 01:17 Read: times |
#84430 - Timing ISR Responding to: ???'s previous message |
I gather the actual firing time is variable therefore the two ISRs may compete if the firing times are the same or close. The choice of cpu could make this easier for you, especially since the '552 is obsolete. Devices with a PCA would make the task siginificantly easier since the timing would be handled by the PCA hardware also since most newer parts have a 6clk or better cpu, the extra performance will also be a benefit. The only other method I could suggest is to use the one compare channel and some extra code so that you load the compare channel with the time value and a state variable with the task to perform at the next compare. That way you only have one ISR for the timing. Again, the performance of the cpu may be an issue considering the time values - 30us is only about 30 instructions! Maybe look at using an AVR? They can be substancially faster in some instances (they have no PCA though). I have implemented a 4 channel phase controlled dimmer in a 8mhz AVR part and still had performance to spare. |
Topic | Author | Date |
Optimizing ISR | 01/01/70 00:00 | |
Delay loop inside ISR=no-no | 01/01/70 00:00 | |
Delay in ISR | 01/01/70 00:00 | |
re-sched ISR | 01/01/70 00:00 | |
Timing ISR | 01/01/70 00:00 | |
ISR | 01/01/70 00:00 | |
More thoughts | 01/01/70 00:00 | |
More thought | 01/01/70 00:00 | |
how about a PCA | 01/01/70 00:00 | |
how about a PCA![]() | 01/01/70 00:00 |