It is a great pet peeve of mine that the logic process to combine the XDATA and CODE spaces is often referred to in an incorrect manner. In engineering it is essential to be precise and accurate.

The logic process requires the two signals /PSEN and /RD to be combined to produce a single /OE (output enable) for the ROM or RAM device attached to the 8052 external bus. The required logic is an OR function and it should be stated as "/PSEN OR /RD" will activate the external memory device. The active levels of these signals are all "low true" and as such the proper gate type must be selected to combine the two signals appropriately. The correct gate for this function is represented and drawn as shown below:



Selection of the proper actual gate to perform this logic function can be eased by this DeMorgan equivalency chart for several common logic functions:



Michael Karas