| ??? 01/25/01 19:18 Read: times |
#8637 - Please help? timer 0 involved, maybe? |
One point of interest; Timer 0 is used in this program. It is disabled before, then reenabled after the DIP switch read sequence, but I thought maybe the Timer doesn't release the bit for general use after it's been enabled? Is that a possibility? I'm already planning on moving the timer over to timer 1 (it has no dependency on external timer control), but I'm hoping I can understand why I have this problem before I go on; just to have that little bit of info tucked into the back of my mind next time... |
| Topic | Author | Date |
| odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 | |
| Please help? timer 0 involved, maybe? | 01/01/70 00:00 | |
| RE: Please help? timer 0 involved, maybe? | 01/01/70 00:00 | |
RE: odd glitchy.. shift reg i/f.. any help? | 01/01/70 00:00 |



