So far I haven't seen a reasonable explanation of the advantages on level triggered interrupts, so I think I'll have a try to explain it.

The processor will initiate an IRQ as soon (and as long) as the /INT pin goes low. So the first task of the IRQ routine is to remove the interrupt source from the input by acknowledging to the periferal that it has seen it's interrupt request. And here lies the main advantage over edge triggered interrupts. Waiting for the line to go high automatically is not an option!!! You have to actively reset the /INT condition.

Imagine having 4 periferals that can generate an interrupt, but you only have one /INT input left. Simply wired-OR all /INT pins to this one input. If one of the periferals causes an interrupt the processor starts it's IRQ routine and then starts scanning the periferals for the source of the interrupt (the one with the highest priority first). When it finds the source it resets the IRQ state of that periferal and services it's needs. After that the IRQ routine is terminated. If an other periferal requires service too the IRQ routine is called again because the /INT line will still be low and the handling of that service is done.
This would never work with edge triggered interrupts because additional interrupts would not be recognised as long as the /INT line remains low.

Hope this little story will explain the use of level triggered interrupts.