| ??? 06/15/05 06:16 Read: times |
#94987 - probably yes Responding to: ???'s previous message |
hi,
Payam Soltany said:
Does it mean instead of
MOV SPCON,#01110001B;Master with SS disabled @ f/4=2.7648MHz(2.8935us per byte) Where SPI configuration is done in the same MOV which enables the SPI, we should use(Notice bit 6) MOV SPCON,#00110001B;Master with SS disabled @ f/4=2.7648MHz(2.8935us per byte) MOV SPCON,#01110001B;Enable SPI (SPEN set) after setting MSTR, CPOL and CPHA bits Where bit 7 is 'manually' set in a second MOV instruction?(looks rather eccentric) I think you meant "bit 6". And I would preffer to use ORL SPCON,#01000000B for enabling SPI; but this is the question of programming style. As about ordering so I think you should do it by two steps: configure then enable. At least, Atmel shows exactly such way in their SPI examples: http://www.atmel.com/dyn/resou...oc4348.pdf By the way, why is this so important? Are you trying to economy 3 bytes of code with 64kb flash derivative? Regards, Oleg |
| Topic | Author | Date |
| SPI enabled after CPOL and CPHA | 01/01/70 00:00 | |
| probably yes | 01/01/70 00:00 | |
| one way stream of data possible? | 01/01/70 00:00 | |
| One way is often the case | 01/01/70 00:00 | |
| MISO left unconnected? | 01/01/70 00:00 | |
Re: MISO left unconnected? | 01/01/70 00:00 | |
| one-way stream | 01/01/70 00:00 | |
| MISO? | 01/01/70 00:00 |