| ??? 02/13/08 07:08 Read: times |
#150703 - re-expalin Responding to: ???'s previous message |
as i understand You have 50msek timer0 ticks, and Timer0ISR counts overflow in tmer1, which occurs each 40microseconds.
My understanding is wrong or mission impossible... |
| Topic | Author | Date |
| Minimum ISR time | 01/01/70 00:00 | |
| "bible" time? | 01/01/70 00:00 | |
| details | 01/01/70 00:00 | |
| re-expalin | 01/01/70 00:00 | |
| Re: Minimum ISR time | 01/01/70 00:00 | |
| what simple ISR? | 01/01/70 00:00 | |
| You're right, it is bloody C | 01/01/70 00:00 | |
| C and ISRs | 01/01/70 00:00 | |
| Know thy tools | 01/01/70 00:00 | |
'using' can be counterproductive in SDCC | 01/01/70 00:00 | |
| ISRs in C | 01/01/70 00:00 | |
| Good point | 01/01/70 00:00 |