??? 09/01/05 20:28 Read: times Msg Score: +2 +2 Good Answer/Helpful |
#100427 - 8 bit shift register, 8 bit parallel out Responding to: ???'s previous message |
It's a very usefull IC.
The chip has 3 separate parts: 1. A 8 bit shift register, use CLK and DATA inp to shift data in 2. A Latch, the shift register is copied into the latch with STROBE, data in the latch is not shifted when CLK toggles. 3. The latch has an output enable. OE is used to set the outputs into 3-state. For example if you use CD4021 (8 bit parallel in and shifted serial out to a microcontroller) Your code look like: 1. set STROBE low (0), set OE to high (1) 2. take a byte, LABEL: set clk pin 0 set a bit on a port pin (DATA) set clk pin 1 goto LABEL (8x for 8 bits (byte)) 3. Now the bits are in the shift register but not on the output pins Q1-Q8 set STROBE high (1), now the byte is visible on Q1-Q8 set STROBE low After setting STROBE low, you can shift in new data. The outputs Q1-Q8 are not affected when CLK toggles now. goto 2. === When STROBE is always high, you can directly follow the shifted data on the outputs, the shift register is continous copied into the latch. When you want to use two 4094 chips you can Qs from chip 1 connect to DATA of chip 2 and use one CLK signal. So you have a 16 bit shift register. Or 3 chips then you have a 24 bit shift register and 24 I/O pins made with only a DATA, CLK and STROBE signal. I tried to explain how the chip works. Success! |
Topic | Author | Date |
CD4094BC | 01/01/70 00:00 | |
a latch is not a flip flop, when the gat | 01/01/70 00:00 | |
May I add... | 01/01/70 00:00 | |
CD4094BC | 01/01/70 00:00 | |
Synchronous and asynchronous operation | 01/01/70 00:00 | |
8 bit shift register, 8 bit parallel out | 01/01/70 00:00 | |
Thank You![]() | 01/01/70 00:00 |