| ??? 03/16/01 17:34 Read: times |
#10058 - RE: General Eprom Interfacing |
EPROM programming.
No there are timing issues as well. For 27128 for example, you set Vpp sure, and you hold up Vcc to 6V, then you set the data and latch the address and hold the data while you pulse the PGM line for 1 mSec or so , then you read the device and see if its programmed, if it isn't you repeat the process. The cycle is not the same as regular memory access. Steve |
| Topic | Author | Date |
| General Eprom Interfacing | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: Matthew Bucknall | 01/01/70 00:00 | |
| RE: Matthew Bucknall | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: Matthew Bucknall | 01/01/70 00:00 | |
| RE: Peter Dannegger | 01/01/70 00:00 | |
| RE: San Bergmans | 01/01/70 00:00 | |
| RE: General Eprom Interfacing | 01/01/70 00:00 | |
| RE: V.DURGAI DASS | 01/01/70 00:00 | |
RE: General Eprom Interfacing | 01/01/70 00:00 |