Yes, our IP Distribution and Business Model is PFE from Xilinx...I'm a Xilinx user from back in the 2000-series days and I always appreciated the ability to play with solutions before buying them.

We are making multiply IP Protection options available:

(1) The first method is to turn your analog IP block into a Spice macromodel. This helps the user (sims run faster) and keeps the implementation details hidden. We have scripts that will then report MSSA utilization so that a user of macromodels will still know how many analog tiles (OpAmps, R, C,...) are still available.

(2) We can also provide scrambled Spice, Verilog, and VHDL netslists to obfuscate the implementation details.

(3) We are looking at VHDL-analog but this requires that our customers also have a simulator that can handle it so we aren't overly excited about this distribution method.