??? 03/25/06 14:04 Read: times |
#113059 - Answers Responding to: ???'s previous message |
Zeeshan said:
I am not sure about the Bus contention that will happen when /RD goes low. I am assuming that when /RD goes low, data from Board-2 (IO Board) will be put on the data bus by U14. Yes, but also, when you read U4 or U5, for instance! Zeeshan said:
Can you suggest any other bi-directional buffer, which might not need the Direction control with /RD line ? But you will read and write to Board-2? You can solve this problem, by only enabling U14, if a chip of Board-2 is being addressed. Zeeshan said:
I suppose a 74HC244 will be adequate to buffer /RD, /WR, A0 and A1 lines ? Yes. Zeeshan said:
Well, i am using a MN1380 Supervisory and Reset IC. But I cannot see it in the schematic, only a RC-reset. Kai |