| ??? 01/26/07 10:44 Read: times |
#131545 - INT0 is assigned to P0.1 as the default Responding to: ???'s previous message |
mov IE, #0D1h
mov IP, #0D0h mov IT01CF, #007h //active low on P0.7 /INT0 is assigned to P0.1 as the default after power-on reset. And it stays there until it is moved to P0.7 by "mov IT01CF, #007h" line. Therefore, you must "mov IT01CF, #007h" line to early stage of the initialization, at least before enabling interrupt. When P0.1 is kept low, clearing IE0 doesn't work. /INT0 is set to active low (IN0PL, IT01CF.3), level trigger (IT0, TCON.0) as the default. IE0 stays asserted in this setting, even if the firmware deserts it. From your post, it is not clear why P0.1 is kept low. In your code, SPI0 interrupt is enabled. So, I suppose SPI0 is assigned to the crossbar. Then P0.1 is attached to MISO of SPI0. MISO may be driven low by an external SPI device. SiLabs chip is equipped on-chip debugger. To trace this kind of error, use it effectively. Show TCON in the timer SFR window, to detect when IE0 bit is asserted. 'View' menu > 'Debug Windows' > 'SFRs' > Timers Set a break point on your code and run to the break point. Then, execute the code line by line using step execution and find where IE0 bit is asserted. Tsueno |
| Topic | Author | Date |
| External Interrupt triggering on initialization | 01/01/70 00:00 | |
| Simple! | 01/01/70 00:00 | |
| yes, but..... | 01/01/70 00:00 | |
| There's probably a good reason. | 01/01/70 00:00 | |
| worth a shot...but | 01/01/70 00:00 | |
| Understanding interrupts | 01/01/70 00:00 | |
| Yes, I Know | 01/01/70 00:00 | |
| terse response | 01/01/70 00:00 | |
| tried clr IE0... | 01/01/70 00:00 | |
| clr IE ?? | 01/01/70 00:00 | |
| I do not use the SILabs deviates, but | 01/01/70 00:00 | |
| Interesting.... | 01/01/70 00:00 | |
| AH, now we get a good guess at the reason. The ex | 01/01/70 00:00 | |
| Maybe it is the part | 01/01/70 00:00 | |
| are you sure | 01/01/70 00:00 | |
| hmmm..... | 01/01/70 00:00 | |
| Hardware bug | 01/01/70 00:00 | |
| down memory lane | 01/01/70 00:00 | |
INT0 is assigned to P0.1 as the default | 01/01/70 00:00 |