Dear Kai,
sorry replying late as I was outstation.
The toggling of CLK line is for preparing the ADC for
next operation as with /CS high no communication occurs.
Interesting development has taken since writing my last
post. I removed CD4052 and put CD4051 instead to select
the various V & A channels. Also used only one CH0 of MCP3202
which was working properly(!). However it doesnt work and same
results are coming. Therefore I have concluded that this is
not MCP problem but the code problem.I get proper DC readings
from both channels. So problem lies in code which takes 64samples in one period of sinewave and then squares the sampled
absolute value (removing VG value of 0x0800 ). Adds the squared
value in interrupt routine only - not shown here but part of
main program in which I use the RDADC bit as flag to wait for
ADC reading to be over.
After summing the sum is divided by 64 and then square rooted.
This is stored in another location as curent reading of that channel.
I clear the 32bit buffer of sum before start of taking RMS
reading. however it seems that last RMS reading remains on
the temporary location of ADC value and thus gets sqaured and
added to sum of Amps value. So divided and squarerooted it adds
offset of V/8 in Amps readings. The next Amps channel gets V/64
and last gets V/512 as offset. How this doesnt happen in V channel I dont understand as I think that A/4096 is very small
value for Vr which is first V channel. However Vy channel which
is next doesnt get Vr/8.
I will putup the main program also if few things which I think
may fix problem doesnt work.
Thanks again,
purushottam