The existing setup is an EPROM loader that gets executed at reset. I plan to simply replace this (cheapest and easiest path to my objective). Apparently the MPU tolerates a slow memory device. During initial boot time, speed is not an issue, only my application code needs the speed. The current loader checks at startup to see if a valid program is still existing in SRAM (SRAM is valid for about 1-2 minutes without power, or could arise from warm reset). If a valid program exists (according to its thinking) then it maps the EPROM out of existance in the memory map and starts the SRAM program execution. If a valid program is not found, it listens to the serial port and loads a hex file when sent. It has a mini command line interpreter and provides other simple functions for testing new hardware and such. After loading the hex file into RAM it waits for the user to press the reset button. On next cycle, the SRAM is valid and the previous senario occurs...the EPROM is mapped out of existance and the SRAM code it started. How all of this is accomplished I am not sure. I want to replace this factory loader with a my own loader which, at startup, looks at SRAM for a valid program. If not found, loads from the EPROM into SRAM, rather than the serial port. My Application program will need to reside in the EPROM along side the loader, of course. I must admit this is a bit unorthodox, but recall I am using an evaluation board for a final product. Actually this is a "final prototype" which can be deployed and tested in the field. Maybe later we will integrate the entire device into our main board (Assuming the customer ends up buying a lot to justify the cost). I am currently trying to get some assembly code working, since C has its own run time environment which apparently gets trashed if I start changing the memory addressing control registers. I wish I had a few years experience with this processor and assmbler. Alas, the deadline is approaching. Thanks for your interest and assistance.