| ??? 10/05/07 14:43 Read: times |
#145462 - what??? and comments Responding to: ???'s previous message |
For me re-entering/re-vectoring of any interrupt ,
prior RETI instruction is disabled in hardware. WHAT??? I dont know will be secondary edge "stored" for additional interrupt or not (as Mr.Malhund guess). That part I did not guess IE0/IE1 can be set while the ISR is executing. Temporary change of priority (inside ISP) will block some other interrupt , not same THAT may be what the OP is seeing and mistakes for reentry. Erik |
| Topic | Author | Date |
| I tested changing prio level from the IT, it works | 01/01/70 00:00 | |
| you MUST be wrong | 01/01/70 00:00 | |
| For Erik | 01/01/70 00:00 | |
| redefine test | 01/01/70 00:00 | |
| what??? and comments | 01/01/70 00:00 | |
| what | 01/01/70 00:00 | |
| IT in derivatives | 01/01/70 00:00 | |
| Stored edges | 01/01/70 00:00 | |
| I'm still certain | 01/01/70 00:00 | |
| I don't see well what you mean. | 01/01/70 00:00 | |
| how about an answer | 01/01/70 00:00 | |
| you are right | 01/01/70 00:00 | |
just read \"the bible\" | 01/01/70 00:00 |