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???
04/24/08 09:52
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Msg Score: 0
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#153946 - P0 pullups
Responding to: ???'s previous message
As port0 is defined as databus(D0-D7) which can be connected to multiple devices like RAM, ROM etc the port should be tristate. With internal pullup(FET Circuit) this is not possible. If a device wants to send data and want to make particular bit 0, with internal pullup it has to source more current to make that line low. With tristate the current will be less to make the line low. Even RAM, ROM databus will be tristate pins. Same concept you can observe in RS-485 networks, I2C interface etc.

List of 33 messages in thread
TopicAuthorDate
about port 0 0f 8051mc            01/01/70 00:00      
   already answered            01/01/70 00:00      
      P0 pullups            01/01/70 00:00      
         Tristate (pedant mode)            01/01/70 00:00      
         This thread turns to helter-skelter            01/01/70 00:00      
         I never heard of that            01/01/70 00:00      
            I never heard of that ?            01/01/70 00:00      
            I never heard of that ?            01/01/70 00:00      
               Tristate (pedant mode, again)            01/01/70 00:00      
                  three states            01/01/70 00:00      
                     not at all confusing            01/01/70 00:00      
               confusing open drain/collector with tristate ...            01/01/70 00:00      
                  Not quite true            01/01/70 00:00      
                     much 'can' be done            01/01/70 00:00      
   read the datasheet ... it is "open-drain"            01/01/70 00:00      
      advantage            01/01/70 00:00      
         that it is not clogged            01/01/70 00:00      
            or a wire-or-ed output            01/01/70 00:00      
               ????            01/01/70 00:00      
         How would you realize an input /output topology?            01/01/70 00:00      
            why            01/01/70 00:00      
               this is the diagram of the "inside" of chip            01/01/70 00:00      
            please comment            01/01/70 00:00      
               1) Maybe, 2) False, 3) False            01/01/70 00:00      
               FAQ            01/01/70 00:00      
               Have you read at all what I wrote??            01/01/70 00:00      
   Port 0            01/01/70 00:00      
      Hhm, still no answer??            01/01/70 00:00      
         This doc explained everything            01/01/70 00:00      
            it should be the first reference!            01/01/70 00:00      
      P0.1            01/01/70 00:00      
         start a new thread            01/01/70 00:00      
         yes to both - it\'s \"bible time\"            01/01/70 00:00      

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