Now , there are 2 possibilities of working with this part,
ie 1.The master "polls" every slave device to see ,checks TI, if there is anything that needs to be xfered, and if the polled device wished to xfer info it will do so immediately.... that means the master is active at all times, ...

or 2. i could use interrupts .. raise INT0/1 on slave, send it on bus to master µc, which when received by the master , sends an acknowledgement and asks to send data, and is ready to receive the data and process it.

assuming you do not have a whole bunch of slaves...
I really don't know what's the best solution here....
rename bit 9 from "address bit' to 'control bit'
then poll by address +0x80 and let a reply of CONTROL 0x40 be 'no thanks.
now you have the polling done with 2 bytes.

option 2 would require additional wires (non-differential = noise prone) how would you have the master determine which slave interrupted?

USING SN75176b
I'd recommend against it unless you have VERY good 'ground control'. The '176 will blow if you tickle it. Use the "industrial strangth" LT1785 instead (same footprint)

Lets say i wish to send some bits from the slave to the master .
ie . µc needs to make pin 4 (d) high and pin 3(DE) high as well. the truth table provided by the manufacturer indicates o/p A would be high and o/p B would be low ......
on the master side vid>.2 v to be able to recive ... ahem .. well i really really don't know how that translates to any communication ... !!!!
it does not "translate to any communication" it ENABLES communication in a given direction.

Erik