As Erik notes, the chip has enable signals, so don't focus too much on the logic table.

You have one signal that enables the transmitter part to start driving the bus. The serial out from your processor may then modulate the bus.

You have one other signal that enables the receiver part to feed data to your processor. The serial in on your processor may then hear anything that happens on the bus.

If you look closer, you'll notice that one enable signal is active high, and one is active low. That will allow you to control receiver and transmitter with a single processor pin. When your processor pin is high, you may transfer data in one direction, and when the pin is low, you may transfer data in the other direction.

If you select to use two processor pins instead - or hard-code the receive enable signal as active - then you can listen in on your own transmissions. This allows you to hear collisions. You might for example reprogram the receive processor pin from UART RX to normal I/O pin with pin-change interrupt and get an interrupt if the signal line changes state. When used as UART RX, the RX pin will not be able to produce an interrupt unless you get a full byte (or whatever word length you have configured) or you get a missing stop bit or similar.

The transceiver is easy to control, but the problem with multiple units on a bus is that you must either have a single master, or have logic to detect collisions from multiple masters starting to send at the same time. Collision detection must be very fast, which is a reason why a PC with an external RS232 to RS485 adapter don't work well as master in a multi-master system. Windows can't react fast enough to collisions.