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01/10/02 07:54
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#18502 - @rusta how we do this ....
:-) well this is real engineering :-)

i hav desinged a 6Layer PCB with a i386EX running at 24Mhz with an FPGA @48MHz several DC-DC converters an an uWave frontend @2.45GHz. the analog filter between the uWave stuff and the FPGA has a gain of about 100dB. All the "old" engineers told me that this is impossible to be on one tight pcb but i made it and the performance is realy good (better than the old system). the main task was the propper layout as the pcb itself is a electrical component and not only a pice of copper that hold the parts :-)
All caps are calculated (yes i mean those between vcc and gnd) regardless if these are bulk or against noise. i have been on a several day training course how to do a emc correct pcb and the money was worth it. the next release of the pcb (no change in placement or components) was much much better with the knowledge of that course.
you need to take care of your layer stack the powerplane cap and the plane inductance. now you get the impedance Z of your power plane what you can compare with your design specification.
assume 5V supply with 5% ripple @1A so you need Ztarget=(PowerSupply)x(allowedRipple)/(current)=(5V)*(5%)/(1A)=0,250Ohm

now assume you have a pcb 160x100mm
a single gate 74ACT00 that needs 0,5A/1,5nsec, max ripple 0,2V and a plane distance of 100um.
by calculation you will see that your plane has a cap of 6,1nF and you need 750pF, so an circular area around your supplypin with a radius of 2,5cm gives you this cap.
we do this calculation with every supply pin and calculate the needed caps and the effective radius the cap will work. furthermore some very well calculated caps are combined to keep the Z of the power supply as low as needed over a calculated frequency range. this is necessary that you do not get unwanted "peaks" due to resonance effects of you pcb design.
next step is to have the signals as slow as possible (no need fo 74ACT if 74LS can do the job)
now you know the caps (forget the 100nF at each supply pin, they come from the old days @4,77MHz PCs an 100nF cap is pure inductive above 5MHz) you need to place them correctly. the trace from the cap to the internal planes, also the ic supply pins to the planes, is very important. must be kept as short as possible. think of the L,C and R you get with the track. prefer to place some smals vias instead of one big via to reduce Z of your via.

i will finish here ... but if you follow the rules you can end with a correct emc designed pcb where you do not need lots of filtering components. you have copper on your pcb. with that you can create L,C,R so use it !

Michael


List of 12 messages in thread
TopicAuthorDate
CONTACLESS (RF ID) CARDS....            01/01/70 00:00      
RE: CONTACLESS (RF ID) CARDS....            01/01/70 00:00      
RE: CONTACLESS (RF ID) CARDS....            01/01/70 00:00      
RE: CONTACLESS (RF ID) CARDS....            01/01/70 00:00      
RE: CONTACLESS (RF ID) CARDS....            01/01/70 00:00      
RE: CONTACLESS (RF ID) CARDS....            01/01/70 00:00      
@rusta how we do this ....            01/01/70 00:00      
RE: @rusta how we do this ....            01/01/70 00:00      
RE: @rustu how we do this ....            01/01/70 00:00      
RE: @rusta how we do this ....            01/01/70 00:00      
RE: No data sheets at <baumerident.com>            01/01/70 00:00      
RE: No data sheets at <baumerident.com>            01/01/70 00:00      

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