Paul,
I've never read that Dallas removed u-code from the design of the '320/'520 and with 4 clocks per cycle they wouldn't have to. Now the '420 is a different story. With 1 clock per cycle they are either using a D-PLL to raise the sequence clock fz or it is hard-wired. Out of interest, what and where have you read on this issue?

The Atmel still run's @ 12 clocks per cycle so i "assume" it is the same u-coded machine we know and love.

regards,
p