| ??? 01/16/02 22:35 Read: times |
#18793 - RE: 8 bit address/data bus and memory I/ |
Eric.
Yes that is for Output. Address decode is 'nored' with RD to read HCTL. Jon |
| Topic | Author | Date |
| 8 bit address/data bus and memory I/O | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/O | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/O | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/O | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/O | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
| RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 | |
RE: 8 bit address/data bus and memory I/ | 01/01/70 00:00 |