Hello Rob,
the output is not inverted.
But when I invert the output it is the same fault.

In my device (CPLD) is a 11 bit PWM generator integrated for 4..20mA Loop.
And a nice start-stop logic for both high speed counters, frequence divider for CPU clock und Latches.
All this functions are connected via a bus interface to the 8252.
It is a periode measuring system.
The normal operating frequence is 100 MHz.

I keep cool, grrrr grrrr
Sascha