| ??? 03/28/02 18:41 Read: times |
#21239 - RE: Very high speed 8052 |
Erik,
Determinism is a function of your program as well as your processor. The 8051 demonstrates indeterminancy for interrupts as instruction lengths are variable. Consequently if you assert an interrupt you do not know if you will wait for the duration of a "MUL AB" or a "INC R0". This is why signal generation routines occur in in fixed "path length" non-interrupt loops to allow "jitter' to be traceable to the xtal stability not interrupt latency. Multiple instruction execution can be as determinate as any other coding technique. High signa transaction rates are EMI "dangerous" meaning "producing" as high transition rates with fast edges" are a major EMI source. The power consumption vrs. clock rate is a CMOS characteristic as power consumption is greatest at state change. regards, p |
| Topic | Author | Date |
| Very high speed 8052 | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
| Will 160MHz do? | 01/01/70 00:00 | |
| RE: Will 160MHz do? | 01/01/70 00:00 | |
| let\'s be reasonable | 01/01/70 00:00 | |
| RE: let\'s be reasonable | 01/01/70 00:00 | |
| RE: let\'s be reasonable | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
| RE: Very high speed 8052 | 01/01/70 00:00 | |
RE: Very high speed 8052 | 01/01/70 00:00 |



