erik malund wrote:
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I did not state "who cares", someone else did. I would not know anything about who cares in simulation since I refuse to do it and would thus not have any knowledge as to who cares. Simulation is SIMULATION and why do it when you can emulate.

I know from the postings here and elsewhere that many do simulate and thus the interest might be there, I merely answered what my experience of IIC use was. If you are going to simulate IIC, you must handle the duality of bit bang and 668. Also a lot of IIC bit banging problems are timing, you will need to be able to simulate refusals and time outs.

Erik

Ahh this is better. :-)

In the proposal I gave to Luca I recommended that an interface that allowed for bit-banging would be extreamely nice. In addition I specified that both byte and bit simulation would be good. Using the visual trace technology that our simulator uses for tracing, I think that a very concise method of simulation and monitoring could be provided. This method would allow the user to monitor the execution of his code at the pin watching data as it comes in or goes out in relation to time. In addition interrupts and SFRs could be monitored with break points set to stop under specified conditions. In essence complete execution under simulation at both the SFR and pin locations.

Bryan