Hi all,

I believe Steve first mentioned about 9 bytes of instructions and 9 instruction cycles. With addition on 8 entries of look-up table.

My codes complete decoding inputs and give results in 9 bytes instructions and 7 cycles either way. But the internal RAM look-up table is within 16 entries :(
Will it do the job?


;; INPUT: P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
;; |----|----|----|----|----|----|----|----|
;; | 0 | 0 | 0 | D3 | D2 | D1 | D0 | 0 |
;; |----|----|----|----|----|----|----|----|
;;
;; note: P0.7, P0.6, P0.5 and P0.0 are hardware-grounded
;;
;; OUTPUT: P1 = low byte, P1.7 = MSB, P1.0 = LSB
;; P2 = high byte, P2.7 = MSB, P2.0 = LSB
;;


DSEG at 00h ;; look-up table starting entry in internal RAM
TABLE:
DS 16
STACK:
DS 1


CSEG at 00h
mov SP, #STACK
mov PSW, #10h ;; select bank2
mov A, #01h
mov R0, #00h
mov R1, #08h

;; load values for look-up table
LOAD_TABLE:
mov @R0, A
mov @R1, A
inc R0
inc R1
rlc A
jnc LOAD_TABLE
clr C
clr A


;; decoding routine, byte(s) cycle(s)
DECODE:
mov R0, P0 ;; 2 2
jb P0.3, SECOND ;; 3 2

FIRST:
mov P1, @R0 ;; 2 2
mov P2, A ;; 2 1
jmp DECODE

SECOND:
mov P1, A
mov P2, @R0
jmp DECODE