As far as I know the 420 runs at 33Mhz and one instruction takes 4 clk cycles which gives
8.25 Mips
at 50 Mhz it would be
12.5Mips which is still some way from 50 Mips
I think the confusion comes from the fact that normal 8052's take 12 clk cycles per instruction.
If you take the 8052 core and stick it in a Altera FPGA you can run it at something like 75Mhz,4 clk per instruction cycle, at 3 volts,going to a 1.8 Volt device you might be able to increase it by another 50%