free tools
start with symphonyeda.com for compiler,simulator.Be aware that vhdl is notoriously difficult to parse and code which simulates does not necciserily have a physical implementation.

www.symphonyeda.com

or peak FPGA time limited compiler/simulator
http://www.acc-eda.com/
symphoney also has good support for VITAL which is used for post layout timing simulation.

www.xilinx.com for huge collection of design tools,plus webfitter which will fit your designs to a xilinx part over t' internet,in vhdl,verilog,palasm,eda,you name it.

Hamberg vhdl archive for huge collection of white papers,tools,models and example code.

http://tech-www.informatik.uni-hamburg.de/vhdl/

should keep you busy for a bit.