If you intend to implement master/slave scheme, all you need is 8-bit bi-directional bus and one strobe line to signal "data-ready-on-bus".

It is only suitable for uni-dir synchronous HW automata. It is because of its guaranteed single-cycle timing. I can't be sure that a slave MCu has accepted data dyring a cycle. In addition to acknowledge line, I also need an interrupt line for master and slave to inform each other that they have some data.