Take a look at your assembly listing to make sure the code is as you'd expect.

Your SP initializes to 07H so it will build up form intenal RAM location 08H upward though it appears from your listing that it would only grow one level.

Since your register bank is probably the default, you'd be using internal RAM locations 00-07h for R0-R7. That should cause no stack conflict.

When you have an elusive bug, challenge the assumptions. If the DJNZ doesn't work but should, see if that really is the nature of the problem.

I'd suggest commenting out the two DJNZ statements and let it run through the subrountine in single pass form with a return on the end.

If it doesn't work even so... then that adds clarity. If it works and the DJNZ still appear the villian, then write a non DJNZ delay routine and validate that it still locks up.

You can test the code independent of the PPI by probing the uP pins with a scope or even a properly polarized LED momentarily.

I'd recommend putting in another layer to your delay loops. If you uP is doing about a million operations a second, a 64K delay could is still very quick in human time.

Take the CALL/RET out and see if that runs:

When things are running chaotic, there is usually a bad assumption in play. The best way to narrow down a bug through a chaotic operation is to find more characteristics of what works and doesn't. Try taking the call/ret out, the djnz, moving the location in memory, etc. And don't trust your assembler. The listng byte by byte can often uncover a problem because if the machine codes don't match your expectations, it will quickly uncover a syntax error like a missing "#" or "@".

Good luck and keep us posted. You learn more about assembly language debugging than writing code. :)

-aka Jay on vacay-tion


Example:

org 0
ljmp init

org 100h
init:

;init ppi delay
mov r0,#00h ;inline delay
idelay2: mov r1,#01h ;XXX ms
idelay3: mov r2,#00h
idelay4: djnz r2,idelay4
djnz r1,idelay3
djnz r0,idelay2

;assumed external port congifuration:
mov dptr, #0300h
mov a, #080h
movx @dptr, a
clr a

loop:

mov r0,#00h ;inline delay
delay2: mov r1,#10h ;X seconds
delay3: mov r2,#00h
delay4: djnz r2,delay4
djnz r1,delay3
djnz r0,delay2

inc a
mov dptr,#0000h
movx @dptr, a
jmp loop

end