Here is the experimented solution: First of all, all pins of 89c52 (except port 0, if not equipped with external pullups)go high due to inbuild pullups. The battery powered SRAM data corruption occurs during very early times of power on.

To prevent this:

if you use 6264 (8Kb) you are lucky because this chip has a second CS pin (pin 27) the only thing you should do is to connect this pin to an unused pin of 8951 over an inverter. during power on, 8951 pin (you used) goes high,inverter makes it low and SRAM is not selected. But you should take this pin to low afterwards.

If you want to use 62256, this chip has only one CS (and active 0). Having this logic in mind, you can add some logic to achive the same.

Rustu